An embedded processor is an electronic control and computation device incorporated into an engineered system, such as a camera, game console, printer, personal digital assistant, and the like. An embedded processor has a processor core and an associated memory. The associated memory commonly includes a scratch pad memory, which is a general-purpose random access memory region for the processor core. The patent application entitled “Scratch Pad RAM with Cache-Like Access Times”, Ser. No. 09/494,488, filed Jan. 31, 2000, and assigned to the assignee of the present invention, describes a technique for accessing scratch pad memory. The contents of the application are incorporated herein. The memory associated with a processor core may also include an instruction cache, a data cache, main memory and I/O devices.
The processor core realizes a number of benefits by using the scratch pad memory instead of the data cache. For example, stores to the scratch pad memory are not written to main memory. For local data, this reduces the bus bandwidth associated with store traffic. Advantageously, a scratch pad data array can be relatively large compared to a cache way. In addition, a full tag array is not needed for scratch pad memory. The equivalent tag functionality is normally replaced by a simple decode of the physical address to determine hit or miss.
Embedded processors are highly customized devices. While a processor core may be common to many embedded processors, other components associated with the processor core, such as scratch pad memory, typically have unique configurations. These unique configurations lead to problems in debugging embedded processor systems.
There are commercially available tools to debug embedded systems. A limitation associated with these tools is that they require information on the configuration of the embedded processor. Thus, a configuration file must be supplied to the tool. The problem with this approach is that someone must generate a configuration file and the tool vendor must support the configuration file. This requires additional work by the system designer and the tool vendor. In addition, the system designer and the tool vendor need to coordinate their work to insure interoperability.
In view of the foregoing, it would be highly desirable to provide an automated technique for identifying a scratch pad memory configuration. The technique should operate through general interrogation of an embedded processor and provide scratch pad configuration information that is readily usable by a debugging tool.